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OCR GCSE Computer Science Notes

1.1.4 Von Neumann Architecture

The Von Neumann architecture is a foundational design model for computers that uses a single memory and bus system for instructions and data.

What Is the Von Neumann Architecture?

The Von Neumann architecture, proposed by mathematician John von Neumann in the 1940s, describes a computer system where both program instructions and data share the same memory space and are processed by the Central Processing Unit (CPU). This model remains at the core of most modern general-purpose computers.

The architecture revolves around a control unit, an arithmetic logic unit (ALU), memory, input/output (I/O) devices, and a shared system bus for data movement. Key to this architecture are several important registers within the CPU that help control program flow and data handling.

Core Principles of Von Neumann Architecture

  • Single memory space: Both instructions and data reside in the same memory.

  • Sequential instruction execution: Instructions are carried out one after the other unless altered by a control flow instruction.

  • Use of registers: Registers store data temporarily for quick access and execution.

  • The fetch-decode-execute cycle: A continuous cycle that runs in the CPU to fetch an instruction from memory, decode it, and then execute it.

Key Registers in Von Neumann Architecture

Registers are small, fast memory units located within the CPU that temporarily store data or addresses. Each register has a specific role in the fetch-decode-execute cycle.

Memory Address Register (MAR)

The Memory Address Register (MAR) is crucial for accessing memory locations.

Purpose:

The MAR stores the address of the memory location that is to be read from or written to. It sends this address to the main memory to fetch or store data.

What It Stores:

  • Memory addresses only – not actual data.

Key Details:

  • When the CPU needs data or an instruction, the address of that data is placed into the MAR.

  • The MAR passes the address to the memory unit via the address bus.

  • The MAR does not store data itself — only the location where the data is found.

Example in Action:

If the CPU needs to access data located at memory address 0x004A, it will:

  • Place 0x004A into the MAR.

  • Send a request to memory using this address to retrieve or store the required data.

Memory Data Register (MDR)

The Memory Data Register (MDR) works closely with the MAR but serves a different function.

Purpose:

The MDR temporarily holds the actual data that is being transferred to or from memory.

What It Stores:

  • Data only – the actual contents retrieved from or sent to memory.

Key Details:

  • When reading from memory: Data from the memory location (pointed to by the MAR) is copied into the MDR.

  • When writing to memory: The CPU places the data to be stored in the MDR before it is written to memory.

  • The MDR interacts with the data bus to move data in or out of the CPU.

Example in Action:

  • If the CPU reads a value from memory address 0x004A, the MAR holds the address, and the MDR receives the value (e.g., 42) from that location.

Program Counter (PC)

The Program Counter (PC) plays a vital role in managing the sequence of instructions.

Purpose:

The PC stores the address of the next instruction to be executed.

What It Stores:

  • Memory addresses only – specifically, instruction addresses.

Key Details:

  • After fetching an instruction, the PC is automatically incremented to point to the next instruction.

  • If the current instruction is a jump or branch, the PC may be updated with a different address.

  • Keeps the CPU on track, ensuring correct execution flow of programs.

Example in Action:

  • If the current instruction is at address 0x0010, the PC holds 0x0010 and then increments to 0x0011 after the fetch stage.

Accumulator (ACC)

The Accumulator is one of the main working registers in the ALU (Arithmetic Logic Unit).

Purpose:

The accumulator stores intermediate results of arithmetic and logical operations performed by the CPU.

What It Stores:

  • Data only – specifically results of calculations or logic operations.

Key Details:

  • Results from operations like addition, subtraction, or logical AND/OR are stored in the accumulator.

  • Often used as both an input and output register during calculations.

  • Speeds up processing by avoiding the need to write temporary results back to memory.

Example in Action:

  • If the CPU is adding 7 + 5, the result (12) is stored in the accumulator, ready for further processing or output.

The Difference Between Storing Data and an Address

Understanding the difference between storing data and storing an address is essential to grasping how the Von Neumann architecture works.

Storing Data:

  • Involves holding actual values or information the CPU will use.

  • Examples: numbers like 10, characters like 'A', or binary results from logical operations.

  • Registers like the MDR and Accumulator store data.

Storing an Address:

  • Refers to holding the location in memory where data or instructions reside.

  • Think of it like holding the "home address" of a piece of data.

  • Registers like the MAR and Program Counter store addresses.

Why This Matters:

  • Incorrectly using data as an address, or vice versa, would result in errors or unexpected behavior.

  • Each register must be used for its intended purpose to maintain proper instruction execution.

The Fetch-Decode-Execute Cycle in Von Neumann Systems

The CPU operates in a repetitive cycle to run programs. Understanding this cycle highlights the roles of each register.

Step 1: Fetch

  • The PC holds the address of the next instruction.

  • That address is copied to the MAR.

  • The MAR sends the address to memory, and the instruction is fetched into the MDR.

  • The MDR then sends the instruction to the Current Instruction Register (CIR) (not detailed here).

  • The PC is incremented to point to the next instruction.

Step 2: Decode

  • The Control Unit (CU) decodes the instruction received from the MDR.

Step 3: Execute

  • The ALU performs operations using the instruction.

  • Any intermediate results are stored in the Accumulator.

  • If a memory operation is needed (like reading or writing), the MAR and MDR are used again.

This cycle continues repeatedly while the program runs, using the registers described to manage both data and addresses.

Summary of Register Roles

To reinforce the learning, here’s a breakdown of what each register does and what it stores:

  • Memory Address Register (MAR)

    • Purpose: Holds the memory location to access.

    • Stores: Address only.

  • Memory Data Register (MDR)

    • Purpose: Holds the data being transferred to or from memory.

    • Stores: Data only.

  • Program Counter (PC)

    • Purpose: Holds the address of the next instruction.

    • Stores: Address only.

  • Accumulator (ACC)

    • Purpose: Holds intermediate results of arithmetic/logical operations.

    • Stores: Data only.

Importance in Modern Computing

Despite being proposed over 80 years ago, the Von Neumann architecture is still a core concept in computing education and is used in most modern CPUs. Understanding the purpose of each register and the distinction between data and address is vital for:

  • Writing efficient programs.

  • Avoiding logical errors.

  • Understanding how high-level code is executed on hardware.

This foundational knowledge prepares students for more advanced topics in computer architecture, assembly language, and systems programming later in their studies.

FAQ

The Von Neumann architecture uses a single memory system for both instructions and data to simplify the computer’s design and reduce the number of hardware components. This design allows the same data and address buses to be used for fetching instructions and accessing data, which lowers manufacturing costs and makes it easier to build general-purpose computers. One key benefit is that it allows the system to be more flexible, as the memory can store any type of information needed by the program. However, a major drawback is known as the Von Neumann bottleneck. Since the CPU must access instructions and data using the same memory channel, it can only perform one memory operation at a time. This leads to performance limitations, especially in tasks requiring large amounts of data processing. Modern computing systems often include optimizations like caching and parallel pipelines to reduce this bottleneck while still using a Von Neumann-style approach.

If the MAR or MDR are used incorrectly during the fetch-decode-execute cycle, it can lead to serious errors that disrupt program execution. For example, if the MAR is given a data value instead of an address, the CPU will attempt to access a memory location that may not exist or is invalid, potentially causing the system to crash or behave unpredictably. Similarly, if the MDR is mistakenly given an address rather than data, the CPU may process meaningless information or fail to execute the instruction properly. The MAR must only store memory addresses, and the MDR must only store the actual data being transferred to or from memory. Mixing these up breaks the logic of the system. Since the control unit relies on the correct flow of address and data values between these registers and memory, any such error would result in incorrect instruction fetching, wrong memory access, or corrupted results during execution.

The accumulator improves the efficiency of arithmetic operations by reducing the number of memory read/write operations needed during instruction execution. Instead of storing intermediate results back into RAM after every operation, the CPU uses the accumulator to hold these temporary values directly within the processor. This makes operations like repeated additions or chained calculations significantly faster, as accessing data from a register like the accumulator is much quicker than accessing main memory. The accumulator works closely with the Arithmetic Logic Unit (ALU), which performs the actual operations. For example, in a calculation involving several additions, the result of the first addition is stored in the accumulator, then used in the next addition without returning to memory. This approach speeds up processing and reduces bus traffic. By minimizing memory usage and keeping results close to the ALU, the accumulator plays a key role in optimizing performance within a Von Neumann system.

Yes, the Program Counter (PC) can be modified manually by certain types of instructions in a program, typically jump, branch, or call instructions. These instructions deliberately change the value of the PC so that the CPU will fetch the next instruction from a different memory location instead of continuing sequentially. This is essential for creating loops, conditional execution, and function calls. For example, in a loop structure, the program may need to return to a previous instruction if a condition is still true. The PC is then updated with the address of that instruction. In function calls, the PC is modified to jump to the function’s memory location and later restored to continue from where it left off. This ability to modify the PC is a fundamental feature of control flow in programming. Without it, all programs would execute instructions in a straight line with no decision-making or repetition.

During a memory write operation, the MAR and MDR work together to ensure that the correct data is stored in the correct memory location. First, the CPU places the address where the data needs to be written into the Memory Address Register (MAR). At the same time, the Memory Data Register (MDR) is loaded with the actual data to be written. Once both registers are set, the control unit sends a write signal to the memory. The memory system then writes the data from the MDR into the memory address specified by the MAR. The sequence of events is: 1) load address into MAR, 2) load data into MDR, 3) activate write control signal, and 4) complete the write by transferring data into memory. This operation ensures that data goes to the correct location, which is essential for maintaining program correctness and reliable system behavior. Mistakes in this process could lead to overwritten or lost data.

Practice Questions

Describe the purpose of the Memory Address Register (MAR) and explain how it is used during the fetch stage of the fetch-decode-execute cycle.

The Memory Address Register (MAR) holds the address of the memory location that needs to be accessed. During the fetch stage, the Program Counter sends the address of the next instruction to the MAR. The MAR then places this address onto the address bus so the CPU can locate the instruction in RAM. The instruction at that memory address is fetched and sent to the Memory Data Register (MDR). The MAR only stores addresses and plays a critical role in ensuring that the correct memory location is accessed during program execution.

Explain the difference between storing data and storing an address, using two registers as examples.

Storing data means holding actual values used in processing, such as numbers or characters. Storing an address means holding the location in memory where data or an instruction is found. For example, the Accumulator stores data—specifically, the results of calculations. In contrast, the Program Counter stores the memory address of the next instruction to be executed. This distinction is important because using a data value where an address is needed—or vice versa—could cause errors. Each register must hold the correct type of value to ensure proper function during the fetch-decode-execute cycle.

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