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IB DP Computer Science Study Notes

2.1.1 Central Processing Unit (CPU)

The Central Processing Unit (CPU) is the primary component of a computer, responsible for executing the instructions of computer programs. It performs the necessary arithmetic, logic, controlling, and input/output (I/O) operations specified by the instructions. This unit is often likened to the brain of the computer due to its crucial role in interpreting and carrying out commands.

CPU Architecture

CPU architecture comprises the design elements that define and influence the CPU's performance and functionality. These components work together to process instructions and manage data in the most efficient way possible.

Arithmetic Logic Unit (ALU)

  • Purpose: The ALU is a fundamental component of the CPU responsible for performing all arithmetic and logical operations.
  • Operations: It executes basic arithmetic operations such as addition, subtraction, multiplication, and division, and logical operations like AND, OR, NOT, and XOR.
  • Significance: The efficiency and complexity of the ALU dictate the performance of the CPU in processing mathematical and logical tasks.

Control Unit (CU)

  • Function: The CU orchestrates the operations of the CPU by telling the ALU, memory, and I/O devices how to respond to the instructions received from the computer's memory.
  • Activity: It decodes the instruction, then coordinates and manages the data flow in and out of the CPU, the ALU, and the memory.
  • Role in CPU: The CU does not execute program instructions; rather, it directs other parts of the system to do so.

Registers in the CPU

Registers are temporary storage areas within the CPU that provide the fastest way to access and store data. Each register serves a specific function and contributes to the CPU's efficiency.

Memory Address Register (MAR)

  • Purpose: Holds the memory address from which data will be fetched to the CPU or written from the CPU to the memory.
  • Operation: When the CPU decides to read or write data, the address of the data is first loaded into the MAR.

Memory Data Register (MDR)

  • Function: Temporarily holds the data that is being transferred to or from the memory.
  • Role: Acts as a buffer between the CPU and the main memory.

Other Registers

  • Program Counter (PC): Holds the address of the next instruction to be executed, automatically incrementing to sequence through the program correctly.
  • Accumulator (ACC): A special-purpose register that stores the results produced by the ALU. It's a critical component in processing data and instructions.
  • Instruction Register (IR): Contains the instruction currently being executed. Instructions are broken down into parts to be deciphered and acted upon.

Interaction Between CPU, Input/Output, and Storage

The CPU's capability extends beyond processing; it includes critical interactions with memory, input, and output devices.

CPU and Input/Output

  • Mechanism: I/O devices like keyboards, mice, and printers communicate with the CPU, either sending data to be processed or receiving data from the CPU.
  • Control and Coordination: The CU manages and controls the exchange of data between the I/O devices and the CPU, coordinating how data is received and sent.

CPU and Storage

  • Primary Storage: Directly accessible by the CPU, primary storage (like RAM and ROM) temporarily holds data and instructions.
  • Secondary Storage: Involves longer-term data storage devices like hard drives and SSDs. Data from these devices is loaded into primary storage when needed for processing.


  • Data Bus: Moves data between the CPU, memory, and other hardware devices.
  • Address Bus: Carries the addresses of data locations (where data is stored or retrieved).
  • Control Bus: Carries control signals from the CPU to other components and from those components back to the CPU.

CPU Block Diagram and Its Importance

A CPU block diagram provides a simplified visual representation of the CPU’s structure and how it connects to memory and other components. This diagram aids in understanding:

  • CPU Interconnectivity: Showcases the link between the CPU, ALU, CU, registers, and the primary memory.
  • Data Flow: Illustrates the flow of data within the computer system, highlighting how different parts are interconnected and interact with the CPU.
  • Operational Insight: Helps students and enthusiasts get a conceptual understanding of CPU operations without the complexity of detailed schematics.

In conclusion, understanding the architecture and functionality of the CPU, along with the roles of the ALU, CU, and various registers, provides foundational knowledge for appreciating how computers function. The CPU's intricate design and its interactions with different computer components underscore its pivotal role in a computer’s overall performance and capabilities.


Clock speed, measured in gigahertz (GHz), indicates how many cycles per second a CPU can perform. It's a rough measure of how many instructions a single CPU core can process each second, affecting how fast the CPU can execute tasks. Higher clock speeds typically mean a CPU can perform more tasks in a given time frame. However, clock speed isn't the only factor in CPU performance; the number of cores is also crucial.

A core in a CPU is essentially like having an additional processor; more cores can allow a computer to perform multiple tasks simultaneously (parallel processing). This is especially beneficial for programs designed to take advantage of multi-threading, where different threads can run independently on different cores. Core count becomes particularly significant for multitasking or for software specifically written to utilise multiple cores (like many modern applications and games). Therefore, a combination of higher clock speeds and more cores generally provides the best performance, though the impact varies depending on the type of tasks and software being used.

Registers in a CPU are faster than cache or main memory due to their proximity to the ALU and the CU, along with their hardware design. Being located within the CPU itself, registers provide the quickest way for the CPU to access data. This is because accessing data from registers does not require the data to travel through the bus system that connects the CPU to the cache or main memory. The physical distance data must travel is significantly shorter when it's within the CPU, reducing the delay in data access (latency). Moreover, registers are designed to be accessed and written to at the speed of the CPU's operation, whereas cache and main memory are typically slower and might need multiple cycles for access. Their design is optimised for speed, using hardware that can operate at the highest possible frequencies, ensuring rapid data exchange directly with the CPU's processing units.

Superscalar architecture and parallelism both aim to increase a CPU's performance by processing more than one instruction during a clock cycle. In a superscalar CPU, multiple execution units (such as more than one ALU) are employed, allowing it to dispatch and execute several instructions simultaneously. This architecture can significantly boost performance, as more tasks are completed in the same amount of time, especially in applications where instructions can be processed independently and in parallel.

Parallelism, on the other hand, refers to the CPU's ability to break down complex instructions into simpler, concurrent tasks. This can be achieved not just within a single CPU core (as with superscalar architectures) but also across multiple cores. By dividing tasks into smaller subtasks that can be executed simultaneously, parallelism maximises the use of CPU resources. Both superscalar architectures and parallelism utilise the concept of doing more work concurrently, thereby enhancing the processing speed and efficiency of the CPU. These strategies are particularly effective for applications that can be divided into parallel workflows, such as graphics processing, scientific simulations, and server applications.

Pipelining in a CPU is a technique used to improve the throughput of the processor by performing multiple operations simultaneously. Similar to an assembly line in a factory, pipelining allows the next instruction to be fetched while the current instruction is being decoded or executed. This process leads to several instructions being in different stages of execution simultaneously. By dividing the execution process into several stages and having different instructions at each stage, pipelining increases the overall processing speed of the CPU. Each stage completes a part of an instruction; thus, instead of waiting for one complete instruction to finish processing before starting the next, the CPU overlaps the execution stages of multiple instructions. This process significantly boosts the CPU's efficiency and speed, reducing the idle time of processor components and increasing instruction throughput.

CISC (Complex Instruction Set Computing) and RISC (Reduced Instruction Set Computing) represent two different approaches to CPU design. CISC architectures are designed with a large set of instructions, some of which are very complex and multifunctional. This approach aims to complete tasks with fewer lines of assembly code, potentially reducing the program size and the number of required memory cycles. However, the complexity of CISC instruction decoding can lead to slower clock speeds and increased chip size.

In contrast, RISC architectures utilise a smaller, more optimised set of instructions. Each instruction is intended to be executed within a single clock cycle, leading to a simpler and more predictable instruction pipeline but often requiring more instructions for complex tasks. RISC processors are typically faster and more efficient than CISC processors at executing simple instructions, which is beneficial in applications where performance per watt is a critical factor. The simplicity of RISC processors allows for a smaller CPU design, which can enhance the speed due to the reduced path lengths for electronic signals.

Practice Questions

Explain the roles of the Arithmetic Logic Unit (ALU) and the Control Unit (CU) in the CPU, and how they interact with each other.

The Arithmetic Logic Unit (ALU) and the Control Unit (CU) are integral components of the CPU, each with distinct but complementary roles. The ALU is responsible for performing all arithmetic and logical operations within the CPU, such as addition, subtraction, and logical comparisons. It is the core unit where actual computation processes occur. On the other hand, the CU manages and controls the operations of the CPU. It decodes the program instructions and directs the operational processes of the ALU, memory, and input/output devices. The CU does not execute these instructions but instead orchestrates the sequence of operations and directs the ALU on which operations to perform. Thus, while the ALU executes the computational tasks, the CU acts as a supervisor, ensuring that these tasks are carried out correctly and efficiently.

Describe the purpose of the Memory Address Register (MAR) and the Memory Data Register (MDR) in the CPU's functionality.

The Memory Address Register (MAR) and the Memory Data Register (MDR) are specialised registers within the CPU that play critical roles in memory management. The MAR is used to store the address of a memory location. When the CPU needs to read from or write data to the memory, the address of the required data is placed into the MAR. This process ensures that the CPU can accurately target the correct memory location for data retrieval or storage. Meanwhile, the MDR, also known as the Memory Buffer Register, temporarily holds the actual data that is being transferred to or from the memory. When the CPU reads data from the memory, it is first loaded into the MDR from where the CPU can access it. Similarly, when writing data, the CPU first places the data into the MDR from where it is written into memory. These registers enable efficient and orderly data processing, ensuring that data handling is accurate and swift.

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Written by: Alfie
Cambridge University - BA Maths

A Cambridge alumnus, Alfie is a qualified teacher, and specialises creating educational materials for Computer Science for high school students.

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